A silicon semiconductor is a material that has been studied as materials for a thin film transistor (TFT) and a solar cell since a long time ago. In particular, the TFT has been studied for a long time. In 1930, Lilienfeld et al. developed it as a current control device, and then in 1945, a vacuum deposited silicon thin film was observed to have a slight TFT action. Bardeen et al. examined the characteristic evaluation to lead to a suggestion in which an electric field to a semiconductor surface due to a gate potential is shielded by surface level, causing surface carriers not to be substantially changed (Bardeen's model). Based on the model, a point-contact transistor (1947) and a junction transistor (1948) that act as a transistor by injection of a minority carrier into a bulk crystal were developed. In 1950, a bipolar transistor was actively studied, and various inexpensive discrete elements have become popular to take the place of a vacuum tube.
However, at that time, a silicon TFT exhibited no characteristic, and compound semiconductors such as CdS were used, but the characteristics of such semiconductors were not stabilized at all. Then, RCA improved the characteristics and developed a TFT using a CdS thin film exhibiting fine characteristics in 1962. Furthermore, from 1960 to 1970, Westinghouse produced operative TFTs on Mylar (polyethylene terephthalate), Kapton (polyimide), and paper that are precursors of a flexible display. Up to then, II to VI compound semiconductors, tellurium (Te), and the like had been used as semiconductor materials. CdSe as a compound semiconductor readily forms a polycrystalline structure through a low temperature process such as deposition, can achieve a hole electron mobility of about 50 cm2/Vs and has characteristics of a high ion current and a low off-state current, and consequently has been used as a TFT material. However, it is a two-dimensional compound semiconductor. This raises an intrinsic problem of stoichiometry and a problem of unstable transistor characteristics due to the contact condition between a gate insulating film and a CdSe interface.
To address this, in 1975, Prof. Spear et al. at Dundee University in the UK successfully developed a hydrogenated amorphous silicon (a-Si:H) thin film that exhibits good semiconductor characteristics by glow discharge. Good TFT characteristics using the thin film were reported in 1979, and then the TFT material has shifted to silicon at once. The (a-Si:H) TFT has a small off-state current and can ensure a high on/off current ratio but is considered to have a disadvantage of a low mobility. In contrast, it has been pointed out that a thin film of silicon deposited at a high temperature or a poly-Si TFT composed of a (poly-Si) thin film that is obtained by heating of an (a-Si:H) thin film has a high mobility but a large off-state current. However, the silicon has finally been selected as the TFT material from the viewpoints of low cost, operability, and performance.
The (a-Si:H) film is excellent in uniformity, reproducibility, and microfabrication properties of the film in the formation of a thin film having a large area and is a material suited for a device having a large area. The a-Si (amorphous silicon) can be treated at a comparatively low temperature. The obtained TFT is a highly resistant material and can work with low voltage alternating-current. Hence, such a TFT is used as a basic switch element for picture elements of LCDs. As a preparation method of a commonly used amorphous silicon thin film, a plasma CVD method, a photo-CVD method, a thermal CVD method, and a reactive sputtering method are known.
There is a production method that includes forming an electron flow from a negative electrode to a positive electrode through a minute substance, inducing plasma on a surface of the minute substance based on the potential difference, and producing a reaction substance by a plasma reaction (see Patent Document 1).
There is a method for forming a thin film that includes introducing a reaction gas that is to be a material of a thin film into a reaction furnace, applying a voltage between electrodes to form plasma and decompose the reaction gas, and causing a chemical reaction to deposit a thin film on a substrate (see Patent Document 2).
In the plasma CVD method, electric energy is applied to a Si-containing material gas such as silane gas (SiH4) to generate plasma, and active radicals or ions are generated to cause a chemical reaction in an active environment.
The generated plasma has two temperatures of an electron temperature and a gas temperature. There are a high temperature plasma having high electron and gas temperatures reaching several tens of thousands Kelvin and a low temperature plasma having a high electron temperature reaching several tens of thousands Kelvin and a low gas temperature ranging from room temperature to hundreds of degree Celsius. In particular, the used of the low temperature plasma enables the formation of a thin film while maintaining a substrate temperature at a low temperature. In contrast to the conventional thermal CVD method in which the temperature of a substrate must be raised to about 1,000° C., the plasma CVD method has an advantage of being capable of forming a thin film while maintaining a substrate at a low temperature.
The formed active species reaches a substrate surface mainly due to diffusion, and undergoes processes such as adsorption, desorption, drawing, insertion, and surface diffusion on the surface to form a film as an a-Si thin film. The electric power used for generating plasma is a direct current, a radio wave, a high-frequency wave, a microwave, and the like. Among them, a high-frequency wave in a frequency band of 13.56 MHz is typically used. In an actual plasma reaction apparatus, electrodes are disposed opposite to each other in a vacuum chamber. The high-voltage electrode is connected to a high-frequency power supply through a dielectric material and the like to form a cathode. The other electrode is grounded together with the vacuum chamber to form an anode. Almost all the high-frequency electric power charged is consumed near the cathode. Thus, in such region, SiH4 is actively excited and decomposed. In addition, the thin film deposition rate is larger on the cathode side. However, the film is formed in a large electric field, the electrode surface is accordingly subjected to a strong impact of positive ions, and it is very difficult to obtain a smooth surface. Therefore, a substrate on which a deposition film is formed is typically installed on the anode side. However, it seems to be disadvantageous for the plasma CVD method that the substrate is affected by the ion impact even in such installation manner. This impact effect is more remarkable when the pressure is lower and when the charged electric power is higher.
With respect to the film growth, the generated active species come into collision in SiH4 gas to be deactivated. However, among them, SiH3 is stable against the deactivation by the collision. In other words, SiH3 has low reactivity, and thus SiH3 alone cannot participate in the formation of a network as long as the growth surface has no dangling bond. Actually, on a substrate having a temperature of 100 to 300° C., it is shown that the surface of a growth film is almost covered with hydrogen. SiH3 that has reached the surface moves to a site from which hydrogen is drawn while diffusing on the surface. When the surface diffusion is active in this manner, Si atoms are arranged in an energetically more stable site to form a dense amorphous film having high relaxivity.
In recent years, new low-defect film preparation techniques have been developed. For example, there are a method in which reaction at a high temperature (350° C. or more) increases the diffusion coefficient of a reaction species and dangling bonds generated by thermal desorption of hydrogen covering a surface are integrated into a film without clearance by supplying a large amount of SiH3, a method in which thermal energy is supplied to a reaction dominating species, and a method in which a growth surface is photoexcited to accelerate surface diffusion. There are also developed a growth/hydrogen plasma treatment repeating method (chemical annealing method) in which an amorphous structure that is present in a several atom layer from a growth surface and that has not been solidified is intended to be relaxed by atomic hydrogen and a method of reducing a thin film growth rate to provide a time needed for relaxation. It has been demonstrated that thin films prepared by the above methods are especially useful as an (a-Si:H) solar cell.
In contrast, in the photo-CVD method, SiH4 is directly (so-called direct photo-CVD) or indirectly (so-called mercury sensitizing or indirect photo-CVD) degraded using light energy, and these methods are collectively called the photo-CVD method. In these growth methods, it is supposed that a growth film surface is not subjected to the impact of ion species and electrons having high energy, and hence mild growth conditions can be obtained. Furthermore, for example, in the mercury sensitizing method, it is considered that a SiH3 reaction species having a large surface diffusion coefficient is selectively generated to achieve conditions suited for the formation of a good film. Generally, a low film formation rate causes a problem, but the use of a high-order silane having a high degradation efficiency, such as Si2H6 and Si3H8 in place of SiH4 compensates for the problem.
As doping for such a thin film, a gas phase doping method is commonly performed. The doping can be readily performed by reaction while adding an impurity gas such as PH3, AsH3 (n-type), and B2H6 (p-type) to a SiH4 source.
By the plasma CVD method and the photo-CVD method as above, an amorphous silicon film can be obtained at a comparatively low temperature (about 300° C.) and the use of SiH4 in combination with another mixing gas enables the reaction of these two or more molecules on a solid phase surface or in a gas phase to form a bond between different elements.
Meanwhile, use of polycrystalline silicon intends to reduce cost by the reduction in cost needed for crystallization which accounts for a large proportion of the raw material cost of single crystalline silicon, and the purity of the raw material and a substrate preparation process including crystallization are improved. As shown in FIG. 1, preparation methods of a polycrystalline silicon wafer are classified into three methods; that is, an ingot slicing method, a sheet method with a substrate, and a sheet method without a substrate. For these three methods, methods shown in FIG. 1 are developed. First, a metallurgical grade silicon (an impurity concentration of about 10−2) as a raw material includes heavy metals (life time killer) that provide a deep level in a bulk crystal, elements that provide a donor and an acceptor, and a large amount of oxygen and carbon. In semiconductor-grade silicon, impurities are chemically removed or removed by segregation to a level not affecting a product. In contrast, a solar cell is not required to have such a high purity that is required for the semiconductor-grade silicon, because it is a large area single junction device. For example, for a solar cell, the necessary impurity level for achieving a conversion efficiency of about 10% is as shown in Table 1. For the solar cell-grade silicon, acid washing, a method using segregation at the time of crystallization, and the like are considered to be effective. The metallurgical-grade silicon includes carbon that is used in a reduction process of silicon oxide, and hence a decarbonizing process is also important.
TABLE 1Concentration in metallurgicalAllowableImpuritygrade silicon (ppm)amount (ppm)DopantAl1,500 to 4,000B40 to 80P20 to 50Life time killerTi160 to 2500.001V 80 to 2000.002Fe2,000 to 3,0000.02Cr 50 to 2000.1Ni30 to 900.8
For the preparation of polycrystalline silicon, a crystal grain size is firstly considered. This is because, especially in a solar cell, when the crystal grain size is large as compared with a film thickness, a minority carrier that flows into a junction to effectively contribute to electric power generation is sufficiently larger than the flow into a grain boundary exhibiting a short carrier lifetime, and this can suppress effects on the crystal grain boundary. An actual silicon solar cell needs a crystal grain boundary of 50 μm or more. The crystal grain boundary greatly depends on a production process and a film thickness, and in general, the production process is broadly divided into a liquid phase method and a gas phase method. The methods shown in FIG. 1 correspond to the liquid phase method. The ingot slicing method is a method in which a molten silicon is poured into a mold and cooled to prepare an ingot and the ingot is sliced.
Silso by Wacker and HEM (Heat exchange method) by Crystal System are known, and a crystal grain boundary prepared by the methods reaches several millimeters. Such a liquid phase method needs high temperature treatment because a molten silicon is typically used, and hence the method needs a large system. In contrast, the preparation method from a gas phase includes a vacuum deposition method, a sputtering method, and a gas-phase chemical reaction (CVD) method as described above. However, the crystal grain boundary obtained by such a method is normally very small, and hence the product cannot be used without treatment. Therefore, in order to obtain a crystal having a large grain boundary, it is necessary to subject the gas phase grown crystal to a crystal growth process in a liquid phase state once again, and this needs treatment with electron beam, laser, lamp heating, and the like.